An integrated circuit or "chip" is commonly contained in a "package" which provides both physical protection for the chip and electrical connections to connect the chip to external circuitry. Rather than placing individual chips in separate packages, however, it is possible to increase circuit density by using a multichip technology such as "flip-chip" technology to mount multiple chips closely together on a common substrate which interconnects the chips. The substrate may be made, for example, of silicon or of ceramic having a thermal expansion coefficient matching that of silicon, in order to reduce stress-induced breakage caused by the chip and the substrate expanding and contracting at different rates.
In flip-chip technology, an array of raised conductive "bumps" such as small solder balls is first formed on the contact pads ("die bond pads") on the face of a die. The die is then inverted or "flipped" and placed face down on a substrate so that the die bond pads are aligned with corresponding contact pads on the substrate ("substrate bond pads"). The solder is then reflowed to electrically and physically connect ("bond") the chip to the substrate.
A primary advantage of flip-chip technology is that, since no wire leads are required to connect the chips to the substrate, the chips may be placed very close together. This maximizes circuit density and increases the signal speed by minimizing the interconnection delay between the chips. However, a disadvantage of flip-chip technology is that the chip is bonded to the substrate by placing the solder bumps on the chip contact pads directly over the substrate contact pads to which they are to be bonded. Since the chip is placed face down on the substrate, the solder bumps are not visible during the bonding operation and a certain tolerance in the placement of the chip on the underlying substrate is required to ensure proper placement of the solder bumps on the underlying substrate contact pads. This tolerance increases the distance which must be allowed between adjacent chips mounted on the same substrate. In addition, this lack of visibility results in some of the chip solder bumps not being sufficiently in contact with the underlying substrate contact pads, thus decreasing the yield.